Memory IP Design Engineer
Synopsys — Noida, Uttar Pradesh
₹4–9 LPA (HireSetu estimate) · 0–2 yrs exp · Freshers eligible · Full-time
HireSetu listing reference 655835 — confirm requirements below, then apply on the employer site.
Quick answer: A circuit design job in Noida for engineers with 0 to 2 years who have already worked on SRAM, ROM or register files in Cadence Virtuoso. Hands-on memory experience is the filter that decides this application.
From Synopsys's job posting
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You are passionate early-career engineer eager to make your mark in semiconductor design. With a solid academic background in electronics, electrical, or computer engineering You are someone who has spent the last couple of years working with embedded memory design and you are ready to go deeper.
You have worked with SRAM, ROM, or Register Files enough to know that the details matter, that a small circuit decision ripples through characterization, layout, and eventually into silicon. You are comfortable working in Cadence tools, writing scripts when repetitive tasks slow you down, and collaborating across teams. At Synopsys, you will work on memory IP that goes into real products, alongside engineers who will help you grow.
What You'll Be Doing
- Design and simulate embedded memory circuits including SRAM, ROM, and Register Files using Cadence Virtuoso and related tools.
- Support layout activities by working with layout engineers to ensure design intent translates cleanly into physical implementation.
- Run bitcell characterization and basic reliability analysis to validate performance across process, voltage, and temperature corners.
- Debug circuit-level issues by analyzing simulation results, identifying root causes, and proposing fixes with guidance from senior engineers.
- Collaborate with CAD, verification, and frontend teams to align on design requirements, timing constraints, and integration needs.
- Characterize the memory compiler for desired PPA.
- Use scripting in C-Shell, Perl, or Python to automate repetitive tasks and improve design flow efficiency.
The Impact You Will Have
- Deliver memory IP blocks that meet performance, power, and area targets for high-volume semiconductor products.
- Reduce design iteration cycles by catching issues early through thorough simulation and analysis.
- Improve design quality and reliability by contributing to characterization and validation efforts.
- Enable faster time-to-market for Synopsys customers by supporting robust and well-documented memory solutions.
- Build reusable design methodologies and scripts that make future projects more efficient.
- Strengthen cross-functional collaboration by clearly communicating design decisions and technical tradeoffs.
- Grow into a more senior role by mastering the fundamentals of memory circuit design in a production environment.
What You'll Need
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related technical field.
- 0 to 2 years of hands-on experience in CMOS circuit design, specifically with embedded memory such as SRAM, ROM, or Register Files.
- Working knowledge of memory architectures, bitcell design, and circuit fundamentals including read/write operations and sense amplifier behavior.
- Experience using Cadence Virtuoso or similar tools for schematic capture, simulation, and layout interaction.
- Exposure to scripting languages like C-Shell, Perl, or Python is a plus and will help you automate workflows and analyze data more effectively.
Who You Are
- You can look at a simulation waveform and spot when something is off, even if you do not immediately know why.
- You ask questions when requirements are unclear instead of guessing and moving forward.
- You can work on multiple design tasks in parallel without losing track of deadlines or deliverables.
- You are comfortable learning new tools and methodologies on the job, and you do not wait for someone to tell you every step.
The Team You'll Be Part Of
You will join the memory IP design team in Noida, working on embedded memory solutions including SRAM, ROM, and Register Files for advanced process nodes. The team focuses on circuit design, characterization, and reliability analysis for products that ship in AI, mobile, automotive, and networking applications. You will collaborate with layout engineers, CAD teams, and verification groups across global locations.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Text from Synopsys's official job posting, formatted by HireSetu. The employer's own page is the final word on details.
HireSetu's note
Memory circuits are the filter
The 0 to 2 years band looks wide. The requirement inside it is narrow: hands-on CMOS circuit design on embedded memory, meaning SRAM, ROM or register files. A digital design course plus an SRAM block you instantiated in RTL does not count, and neither does a semester of general analog work with no memory in it. If your exposure is a bitcell you characterised in a college project or an internship, write down what you measured and at which corners. That detail does more than any list of tools.
You own the schematic and the bug
It is easy to read "work with layout engineers" and "collaborate with verification" and assume the job is coordination. It isn't. You design and simulate the circuit, run the corner sweeps, and work out why a waveform looks wrong. Layout carries your intent into silicon and verification checks the result, but the debugging starts with you. That is the skill the posting keeps describing in different words.
Scripting buys you time
C-Shell, Perl and Python are listed as a plus, which is fair. Nobody hires a memory designer on Python alone. But characterisation means running the same simulation across process, voltage and temperature corners, over and over, and the engineer who automates that gets more done in a week. One script that parses simulation output and flags failures is worth a line on your CV.
The compiler work is the unusual part
Characterising a memory compiler for PPA is the line most candidates will skip past. A compiler generates memory instances at many sizes and configurations, and each one has to hit its power, performance and area numbers. It is real production work, and it is where the Noida team's results end up in AI, mobile, automotive and networking chips. Ask which compiler and which process nodes you would touch, since that shapes the first year more than the job title does.
Drafted with AI from Synopsys's job posting and checked by Prashanth Jakkula before publishing. See our Editorial Policy.
How to apply
- Open Synopsys's careers site with the Apply button.
- Follow the application steps on the site and upload your resume.
- Keep the confirmation email or application number for follow-up.
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