Silicon Engineer, Platform and Devices, University Graduate, 2026

Google — Bengaluru, Karnataka

₹8–12 LPA (HireSetu estimate) · Entry level · Freshers eligible · Full-time · onsite

HireSetu listing reference 6a3d2f — confirm requirements below, then apply on the employer site.

Quick answer: A new-grad chip role on Google's consumer hardware silicon team in Bengaluru. You'll be hired into one of four areas, SoC/ASIC design, design verification, physical design or DFT, and the differentiator is hardware work done outside coursework plus Verilog or SystemVerilog.

From Google's job posting

Early

Experience completing work as directed, and collaborating with teammates; developing knowledge of relevant concepts and processes.

info_outlineXIn most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications

  • Bachelor's degree in Electrical, Electronics and Communication Engineering, a relevant technical field, or equivalent practical experience.
  • Experience with design concepts and computer hardware architecture.

Preferred qualifications

Internship work, work experience, or personal project experience outside the classroom in Hardware, Electrical Engineering or Mechanical Engineering.

  • Experience in one or more of the following areas: SoC/ASIC Design, Design Verification, Physical Design, Design for Testability.
  • Experience with Verilog/HDL or System Verilog coding.

About the job

Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.

Google's Consumer Hardware Silicon division builds chips optimized for Google-branded consumer devices. Our product areas include imaging, machine learning, video, and security. We aim to build a team with talent that resonates with Google's culture of innovation and fun.

As a Silicon Engineer, you will design, develop, and deploy consumer hardware. As a member of a fast-paced multi-disciplinary team, you will use your creativity and various range of engineering experience to explore solutions to a variety of engineering problems. Additionally, you will participate in the design, analysis, and prototyping of new concepts. You will also work in a manufacturing and product oriented development environment and collaborate with vendors and outside sources in order to see parts through to manufacture.

The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.

Responsibilities

  • Work with the SoC teams to develop power and performance optimized chips.
  • Contribute to the design, verification, and silicon implementation of ASICs and SoCs.
  • Work on design concepts around CPUs, image processing, machine learning, computer vision, security, and video.
  • Collaborate with teams in automating the SoC design flows.

Text from Google's official job posting, formatted by HireSetu. The employer's own page is the final word on details.

HireSetu's note

Four jobs sharing one title

The preferred list names four areas: SoC/ASIC design, design verification, physical design and DFT. Those are separate jobs with separate daily work. Verification is testbenches, regressions and debugging failures. Physical design is floorplanning, place-and-route and timing closure. DFT is scan insertion and test coverage. Design is RTL and microarchitecture.

Work out which one your projects actually sit in, then lead your resume with it. A listing that covers all four means the team will slot you where your evidence is strongest.

The posting also says interviews happen in person in most cases, so be ready to travel to Bengaluru.

Long feedback loops, many teams

Chip work runs on EDA tools, and results come back hours after you launch a run. A build, a synthesis pass or a regression can eat an afternoon. You'll spend real time reading logs and narrowing down why something failed, not just writing code.

The responsibilities put you next to SoC teams on power and performance, and the work goes through manufacturing with outside vendors. Expect a lot of coordination: designers, verification, physical design and external partners all touching the same block.

Brush up the basics before you talk to anyone

The minimum bar is design concepts and computer hardware architecture. In plain terms: digital logic, pipelining, caches and the memory hierarchy, clocking and setup-hold timing. Know how to explain a block you built, what it does and where the data goes.

For Verilog or SystemVerilog, blocking versus non-blocking assignment and how to write a simple testbench come up in most chip interviews anywhere, not just here. The product areas are CPU, imaging, machine learning, computer vision, security and video, so pick the one closest to your coursework and be able to say why.

Drafted with AI from Google's job posting and checked by Prashanth Jakkula before publishing. See our Editorial Policy.

How to apply

  1. Open Google's careers site with the Apply button.
  2. Follow the application steps on the site and upload your resume.
  3. Keep the confirmation email or application number for follow-up.

Apply on Google's site

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