Senior DRAM RTL design engineer

Micron — Hyderabad - Phoenix Aquila, India

: • Take responsibility for designing digital IP blocks from initial microarchitecture to RTL creation, integration, and supporting physical hardware development. • Define and review module interfaces and system-level architecture. • Actively demonstrate AI‑based tools, agentic workflows, and automation frameworks to:• Accelerate RTL design optimization and design‑space exploration • Assist in testbench generation and corner coverage • Improve debug efficiency across simulation and silicon learning loops • Define semicustom methodology for memory design • Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis. • Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. • Collaborate closely with architecture, design, verification, and physical design / layout teams. • Oversee and manage the layout process including floor-planning, placement, and routing. • Perform block-level and full-chip verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. • Contribute to cross-group communication to work towards standardization and group success • Provide technical mentorship and participate in design and methodology reviews. • Drive innovation into the future memory generations and design methodology within a dynamic work environment • Master’s degree in electrical or computer engineering with 3 - 6 years of experience in RTL design. • Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies. • Deep understanding of SoC design flows (Lint, CDC, synthesis, STA, power analysis) • Fundamentals in CMOS circuit design, device physics and memory operation. • Ability to work effectively with global multi-functional teams. • Domain knowledge in DRAM design (DDR5, LPDDR5 or HBM or in any other memory related field) • Exposure to or strong interest in AI/ML-assisted

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