Senior Principal Engineer Analog Design (HBM PHY)

Marvell Technology — Bangalore

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects. What You Can Expect Senior Principal Analog Lead to drive the design and delivery of next-generation HBM PHY analog and mixed-signal solutions for AI, HPC, and hyperscale systems. This is a high-impact technical leadership role with ownership of PHY circuit architecture, analog/mixed-signal design, and silicon bring-up , working across digital, system, and packaging domains. You will play a critical role in shaping high-speed interface design at advanced process nodes , pushing the limits of bandwidth, power efficiency, and signal integrity. Own the analog/mixed-signal architecture of HBM PHY, including: TX/RX design, clocking, DLL/PLL, reference circuits Training assist circuits, calibration engines, and margining support Lead design of critical high-speed blocks: IO drivers, receivers

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