CPU Design Engineer

Intel — India, Bangalore

Job Details: Job Description: You will be part of Intel Core RTL Design Team working on Intel latest CPU s design on the World s leading process technologies. Roles and Responsibilities: •Understand feature specifications from Architects, and design and implement Core RTL features independently •Develop micro architectural specifications •Apply design methodologies, tools, and AI-enabled techniques to optimize RTL for power, performance, area, and timing (PPA) while ensuring design integrity for physical implementation •Collaborate with Validation teams to review verification plans and ensure correct feature coverage •Work closely with Back-End teams to evaluate design trade-offs across area, timing, and power •Drive feature/design forums, analyze options, and provide data-driven recommendations to management Qualifications: •Master's degree in Electronics or Computer Engineering with 5+ years of experience, or •Bachelor's degree with 6+ years of experience in RTL design Preferred Qualifications: •Strong understanding of digital design fundamentals and x86 architecture/ISA, including integer and floating-point operations •Experience in one or more domains: Execution units (Integer/FP), Cache, Power Management, Memory •Proficiency in Verilog/System Verilog, and experience with simulation/debug tools such as Verdi •Familiarity with static verification tools (Lint, CDC, RDC, UPF, integration flows) •Strong problem-solving skills, self-motivation, and excellent written/verbal communication •Proven ability to work effectively in a fast-paced, cross-site collaborative environment Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences. Posting Statement: All qualified applicants will receive considerat

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