Sr Staff Engineer

GlobalFoundries — IND - Karnataka - Bengaluru - Central

About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction : The DFT engineer plans and executes advanced Design-for-Test solutions in semiconductor chip development. This role focuses on building and implementing robust DFT flow for ATPG, MBIST, LBIST, analog test solutions Your Job: Define and deploy DFT architecture for chips with features such as Automatic Test Pattern Generation (ATPG), Memory Built-In Self-Test (MBIST), Logic Built-In Self-Test (LBIST), and analog test solutions. Develop and validate test patterns, prioritizing test time reduction and manufacturing efficiency. Collaborate cross-functionally to integrate DFT features and requirements throughout the silicon development lifecycle. Continuously analyze test performance data and apply lessons learned for iterative improvement. Document DFT specifications, standards, and re-use strategies for knowledge sharing and future use. Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 8-12 years of hands-on DFT experience plus proven leadership of DFT teams on SoCs. Expertise in test pattern generation, ATPG, MBIST, LBIST, analog test development, and scan insertion. Significant experience optimizing test time through efficient DFT strategies and tool use. Proven ability to design and implement repeatable DFT flows and reusable test IP. Proficiency with EDA too

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